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october 2007 rev 2 1/15 AN1690 application note fail-safe biasing for st485eb introduction st485eb is an rs-485 based interface designed for multipoint differential transmission on a single twisted pair cable. it allows half duplex bi-directional transmission, long cable lengths and high data rates. typical applications include lans, industrial (plc devices), automotive and computer interfaces. system evolution in the data communication field has lead to the development of faster devices with lower data bit error rates. the st485eb meets all these requirements. figure 1 shows a typical multipoint bus configuration. figure 1. typical rs-485 line www.st.com
contents AN1690 2/15 contents 1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 bus states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 data transmission protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 internal fail-safe and bus termination . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 dc terminated fail-safe resi stor value calculations . . . . . . . . . . . . . . . . 7 5.1 example calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6 ac terminated fail-safe resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 7 fail-safe in multipoint transmis sion buses . . . . . . . . . . . . . . . . . . . . . . 10 8 fail-safe circuit compar isons with st485eb . . . . . . . . . . . . . . . . . . . . 11 9 conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 10 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
AN1690 list of figures 3/15 list of figures figure 1. typical rs-485 line. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 figure 2. differential plot for driver outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 figure 3. asynchronous uart sequence format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 4. terminated line (on both sides) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 5. open terminated line (end side only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 6. unterminated or open line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 7. external fail-safe and line dc termination resistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 8. ac termination with external fail-safe . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 9. multipoint transmission line with st485eb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 10. equivalent test circuit for a fully loaded network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1 figure 11. dc fail-safe characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 12. fail-safe dc termination - eye pattern and test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 13. fail-safe ac termination - eye pattern and test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
overview AN1690 4/15 1 overview in a point-to-point configuration (such as the rs -422 standard) the driver is normally always enabled. the bus can remain only in the high or low state (the bus is always biased). in a multipoint application, when more than one driver is physically connected to the bus and only one driver at a time is enabled during data transmission, all the drivers can be disabled when there is no data to send. in this case there is no bus biasing (undefined state). fail- safe biasing solves this problem providing the bus with a proper known state. this application note describes the topic of fail-safe biasing. 2 bus states when a bus is driven by an active driver, it can be in one of two states, either high or low. it can also be kept in one of these states by external pull-up resistors that provide the necessary voltage to get a known bus state. the undefined state in rs-485 standard buses occurs every time the differential voltage is less than +/-200 mv. in figure 2 the bus is driven from low to high and is then disabled. the bus, however, remains high due to external fail- safe biasing. figure 2. differential plot for driver outputs
AN1690 data transmission protocol 5/15 3 data transmission protocol one of the most well known formats for low speed data transmission is the uart timing format. it is an asynchronous protocol, typically composed of 12 bits. the timing sequence starts with a transition from high to low. next there are 9 data bits (8 data bits plus a parity bit). finally, the line remains high for one or two bits, which represents the end of the character. figure 3. asynchronous uart sequence format in a multipoint application, when no more data has to be sent, the line should remain high until the next start bit. since the active driver is disabled, and all other drivers are off, this is not easy to achieve. one way to solve this problem is the use of an alternate protocol (software solution). the other way is to use fail-safe biasing (hardware solution).
internal fail-safe and bus termination AN1690 6/15 4 internal fail-safe and bus termination transceiver manufacturers avoid external biasing resistors by providing internal pull-up resistors at the receiver inputs, which is effective for detecting open circuits or for those applications where termination resistors are not needed. the line termination resistors (typically 54~120 ? for a twisted pair cable) load the line avoiding the need for internal pull- up resistors to define the receiver output. figure 4 , figure 5 , and figure 6 show differential voltage levels for different line conditions for the st485eb receiver interface. note: there is no dr iver leading the line. figure 4. terminated line (on both sides) figure 5. open terminated line (end side only) figure 6. unterminated or open line
AN1690 dc terminated fail-safe resistor value calculations 7/15 5 dc terminated fail-safe resistor value calculations the external resistors are selected so that they provide at least a 200 mv bias across the line, without excessively loading the active driver. in addition, some other conditions should be met: the pull-up (ra) and pull-down (rc) resistors should be of equal value in order to load the driver outputs symmetrically. termination resistor (rd) should match the characteristic impedance (zo) of the line cable, in order to avoid signal reflections. at the other end of the cable, the equivalent resistance of ra, rb, and rc should also match the characteristic impedance of the line. in the following figure 7 , the equivalent resistance is rb ii (ra+rc ), which means rb must be greater than zo and rd. figure 7. external fail-safe and line dc termination resistors the fail-safe bias vid is the voltage drop across the line. therefore, the fail-safe bias is simply a voltage divider between rb ii rd, ra and rc. note that this formula neglects cable resistance, and that rb is parallel to rd (rb ii rd). the choice of resistors must take into accoun t other factors such as power supply voltage tolerance and resistor tolerance, so that under worst case conditions, vid is greater than 200 mv. 5.1 example calculation for this example, based on figure 7 , we assume that the cable has a characteristic impedance zo=120 ? and that the power supply voltage vcc is 5 v. we also assume that rb and rd are equal and their value matches zo (rb=rd=zo=120 ? ). calculate the equivalent resistance of rb ii rd. rt = 120 ii 120 = 60 ? . calculate ra and rc for a vid = 200 mv. ? vid = vcc (rt/(rt+ra+rc)). solving for ra+rc ? ra+rc = ((vcc)rt/vid)-rt. ra+rc = ((5 v)60 ? /0.2 v)-60 ? = 1440 ? . ? ra = rc = 720 ? recalculate the equivalent termination resistance at the end of the cable. req = rb ii (ra+rc). rb = 120 ii (720+720) = 110 ? . this value is close (<10%) to the characteristic impedance zo. however req could be matched to zo by setting the following equation:
dc terminated fail-safe resistor value calculations AN1690 8/15 equation 1 then equation 2 the calculated values for ra and rc could be slightly decreased to provide a vid >200 mv, and to meet the worst case power supply and resistor tolerance conditions. then ra and rc could be 500 ? . however the value of ra and rc should not be reduced too low in order to minimize the driver loading when the driver is active. an active driver is required to create a minimum of 1.5 v across the cable termination. the use of low resistance pull resistors makes this voltage more difficult to meet. zo rb ra rc + () || = rb 131 ? =
AN1690 ac terminated fail-safe resistor 9/15 6 ac terminated fail-safe resistor the dc termination (with and without fail-safe biasing) increases power consumption due to the current flow through the termination resistors. in order to reduce the current absorbtion, the fail-safe network could be modified as shown in figure 8 . figure 8. ac termination with external fail-safe the rc termination blocks dc current. the value of ra and rc can be increased, but not so much that noise immunity is made worse. although rb always equals the cable?s characteristic impedance (zo), the choice of c requires some judgement. large c values provide good terminations by allowing any signal to see an rb that matches zo, but large values also increase the driver?s peak output current and the time constant rc, therefore decreasing signal quality.
fail-safe in multipoint transmission buses AN1690 10/15 7 fail-safe in multipoint transmission buses as discussed in the example of the calculation for fail-safe resistors, when calculating their values, the following conditions must be satisfied: the driver must be able to develop a differential output voltage vod >=1.5 v the excessively low resistance of the pull resistors could affect the driver differential output voltage. in a multipoint application, where up to 32 transceivers could be connected in parallel to the transmission line ( figure 9 ), the differential output voltage drops, due to the equivalent input impedance of all the receivers connected. a minimum input impedance of 12 k ? for each receiver is required, so in the worst case of a fully loaded network (32 unit loads) the equivalent resistance seen by the active driver is (12 k ? / 32) = 375 ? . figure 9. multipoint tran smission line with st485eb this value should be reduced in order to take into account that there are 31 drivers in a high impedance state, each with a leakage current. however in the st485eb device this current is less than 10 a, so its effect can be neglected. with regard to the ground shift, the previous schematic can be modelled as shown in figure 10 , in order to verify the driver output voltage capability.
AN1690 fail-safe circuit comparisons with st485eb 11/15 figure 10. equivalent test circuit for a fully loaded network this test was performed on the st485eb driver. the resistor values were: ra = rc = 500 ? rb = 60 ? with the common mode voltage vcm varied from -7 to +7 v, the device meets the 1.5 v minimum differential voltage (vod). 8 fail-safe circuit comparisons with st485eb the following measurements were performed with two st485eb devices connected in point-to-point configuration across a twisted pair cable of 1 m length. ta b l e 1 summarizes the dc characteristics with different termination circuits. note: vcc=5 v vcm= -7 to +7v vcc2 vcc1 st485 driver rb ra rc 375 375 32 unit loads vod vcm= -7 to +7v vcc2 vcc1 st485 driver rb ra rc 375 375 32 unit loads vod eb table 1. dc fail-safe characteristics schematic ra=rc ( ? )rb ( ? ) c (nf) vid (mv) fail-safe current (ma) receiver output state no termination - - - 1430 - fixed high (internal fail- safe) dc termination - 120 - 1.45 - undefined fail-safe dc termination 500 120 - 280 4.72 fixed high fail-safe ac termination 22 k ? 120 100 4040 0.0316 fixed high
fail-safe circuit comparisons with st485eb AN1690 12/15 figure 11. dc fail-safe characteristics another test was performed to verify the behavior of the different termination circuits when an ac signal is present on the line. figure 12 and figure 13 show the eye patterns of the signals driven respectively at the end of a 100 m cable and on the receiver output. the driver was led by means of a prbs (pseudor andom bit signalling) ge nerator with 5 mbit/s data rate.
AN1690 fail-safe circuit comparisons with st485eb 13/15 figure 12. fail-safe dc termination - eye pattern and test circuit figure 13. fail-safe ac termination - eye pattern and test circuit 120 500 500 prbs generator ch1 differential probe ch3 probe 100 cable 130 receiver input receiver output 120 500 500 prbs generator ch1 differential probe ch3 probe 100 cable 130 120 120 120 500 500 prbs generator ch1 differential probe ch3 probe 100 cable 130 receiver input receiver output receiver input receiver output c rc ra rb c rb prbs generator ch1 differential probe ch3 probe 100m cable receiver input receiver output c rc ra rb c rb prbs generator ch1 differential probe ch3 probe 100m cable c rc ra rb rb c rb c rb rb prbs generator ch1 differential probe ch3 probe 100m cable receiver input receiver output receiver input receiver output
conclusion AN1690 14/15 figure 12 and figure 13 show how the choice of termination could influence the signal quality at the end of the transmission line. in particular, the ac termination seems to be worse than the dc one, when the cable length increases (the output presents jitter and inter-symbolic interferences). 9 conclusion external fail-safe bias resistors can be used to solve the idle line state problem that commonly occurs in multipoint applications using asynchronous protocols. this hardware approach is well accepted. in fact many complete interface standards such as scsi-1 and 2 (small computer system interfac e) and ipi (intelligent periphe ral interface) have adopted this method. this application note provides gu idance to select pro per fail-safe schematic and external component values that will prov ide an adequate bias, while minimizing the loading effect on the line driver. 10 revision history table 2. document revision history date revision changes 21-jun-2004 1 first release 02-oct-2007 2 ? no content changes, document reformatted. ? st485 replaced by st485eb
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